Floating point notation is widely used in digital data processing to represent a much larger range of numbers than can be represented in regular binary notation. Various types of floating point notations are used. Typically, a floating point number has a sign bit (s), followed by an exponent field (e) and a mantissa or significand field (fff). Usually, the sign bit, exponent, and mantissa are applied to a formula such as: EQU Value=(-1).sup.S .times.(1.fff.sub.2).times.2.sup.e.
A normalized floating point number has a one to the left of the decimal point in the mantissa.
A floating point unit (FPU) is used to perform arithmetic operations on floating point numbers, such as addition, subtraction, multiplication, and division. After an arithmetic operation, the most significant one in the result may not be in the most significant bit position. For instance, if two close numbers are subtracted, the result may have one or more leading ones or zeros. Therefore, in order to normalize the floating point number, the number must be left shifted until the first one in the result is in the left most position in the mantissa.
Normalizing a result after an arithmetic operation often introduces a significant time delay. Normalization typically involves scanning the mantissa of a result for the most significant one and encoding the number of bit positions the mantissa needs to be left shifted. The code is usually provided to a shifter to left shift the mantissa.
The normalized mantissa must also be analyzed for all zeros or all ones. That is, a mantissa of all zeros or all ones requires special consideration. For instance, an arithmetic result may have a normalized mantissa of all zeros indicating a floating point zero. A floating point zero, however, is typically a reserved state in which the mantissa and exponent bits are all zeros.
A mantissa of all ones is another special circumstance. For instance, an overflow error may occur if the mantissa is rounded. That is, if a mantissa of all ones is rounded up, all of the bits of the mantissa will transition to zero and a carry out will be generated. In which case, the exponent must be incremented in order to represent the number. If the exponent becomes all ones after being incremented, then the number becomes infinity.
Many typical FPUs detect zeros and ones after a mantissa has been left shifted. In which case, the delay for the left shifting is combined with the delay for the detection. In order to increase computational performance, a need exists for an improved method and apparatus to test a normalized mantissa for all zeros or all ones.